| Design solutions for sample-and-hold circuits in CMOS nanometer technologies F Centurelli, P Monsurrò, S Pennisi, G Scotti, A Trifiletti IEEE Transactions on Circuits and Systems II: Express Briefs 56 (6), 459-463, 2009 | 60 | 2009 |
| Efficient digital background calibration of time-interleaved pipeline analog-to-digital converters F Centurelli, P Monsurrò, A Trifiletti IEEE Transactions on Circuits and Systems I: Regular Papers 59 (7), 1373-1383, 2012 | 54 | 2012 |
| Behavioral modeling for calibration of pipeline analog-to-digital converters F Centurelli, P Monsurrò, A Trifiletti IEEE Transactions on Circuits and Systems I: Regular Papers 57 (6), 1255-1264, 2010 | 39 | 2010 |
| A bootstrap technique for wideband amplifiers F Centurelli, R Luzzi, M Olivieri, A Trifiletti Circuits and Systems I: Fundamental Theory and Applications, IEEE …, 2002 | 34 | 2002 |
| A bootstrap technique for wideband amplifiers F Centurelli, R Luzzi, M Olivieri, A Trifiletti MixDes 00 Int. Conf. on Mixed Design of Integrated Circuits and Systems, 383-386, 2000 | 34 | 2000 |
| A Topology of Fully Differential Class-AB Symmetrical OTA With Improved CMRR F Centurelli, P Monsurrò, G Parisi, P Tommasino, A Trifiletti IEEE Transactions on Circuits and Systems II: Express Briefs 65 (11), 1504-1508, 2018 | 32 | 2018 |
| Low power DDA-based instrumentation amplifier for neural recording applications in 65 nm CMOS M Avoli, F Centurelli, P Monsurrò, G Scotti, A Trifiletti AEU-International Journal of Electronics and Communications 92, 30-35, 2018 | 30 | 2018 |
| A class-AB flipped voltage follower output stage F Centurelli, P Monsurrò, A Trifiletti 2011 20th European Conference on Circuit Theory and Design (ECCTD), 757-760, 2011 | 29 | 2011 |
| A 0.3 V, Rail-to-Rail, Ultralow-Power, Non-Tailed, Body-Driven, Sub-Threshold Amplifier F Centurelli, R Della Sala, G Scotti, A Trifiletti Applied Sciences 11 (6), 2528, 2021 | 28 | 2021 |
| Improved Digital Background Calibration of Time-Interleaved Pipeline A/D Converters F Centurelli, P Monsurrò, A Trifiletti Circuits and Systems II: Express Briefs, IEEE Transactions on 60 (2), 86-90, 2013 | 27 | 2013 |
| A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate F Centurelli, R Della Sala, P Monsurrò, G Scotti, A Trifiletti Journal of Low Power Electronics and Applications 11 (2), 19, 2021 | 26 | 2021 |
| 0.6‐V CMOS cascode OTA with complementary gate‐driven gain‐boosting and forward body bias D Cellucci, F Centurelli, V Di Stefano, P Monsurrò, S Pennisi, G Scotti, ... International Journal of Circuit Theory and Applications 48 (1), 15-27, 2020 | 25 | 2020 |
| Enabling ULV fully synthesizable analog circuits: The BA cell, a standard-cell-based building block for analog design R Della Sala, F Centurelli, G Scotti IEEE Transactions on Circuits and Systems II: Express Briefs 69 (12), 4689-4693, 2022 | 20 | 2022 |
| A Tree-Based Architecture for High-Performance Ultra-Low-Voltage Amplifiers F Centurelli, R Della Sala, P Monsurrò, G Scotti, A Trifiletti Journal of Low Power Electronics and Applications 12 (1), 12, 2022 | 20 | 2022 |
| An Ultra-Low-Voltage class-AB OTA exploiting local CMFB and Body-to-Gate interface F Centurelli, R Della Sala, P Monsurró, P Tommasino, A Trifiletti AEU-International Journal of Electronics and Communications 145, 154081, 2022 | 20 | 2022 |
| Comparative performance analysis and complementary triode based CMFB circuits for fully differential class AB symmetrical OTAs with low power consumption F Centurelli, P Monsurrò, A Trifiletti International Journal of Circuit Theory and Applications 44 (5), 1039-1054, 2016 | 20 | 2016 |
| Design and validation through a frequency-based metric of a new countermeasure to protect nanometer ICs from side-channel attacks S Bongiovanni, F Centurelli, G Scotti, A Trifiletti Journal of Cryptographic Engineering 5 (4), 269-288, 2015 | 20 | 2015 |
| A Standard-Cell-Based CMFB for Fully Synthesizable OTAs F Centurelli, R Della Sala, G Scotti Journal of Low Power Electronics and Applications 12 (2), 27, 2022 | 18 | 2022 |
| A New VCII Application: Sinusoidal Oscillators V Stornelli, G Barile, L Pantoli, M Scarsella, G Ferri, F Centurelli, ... Journal of Low Power Electronics and Applications 11 (3), 30, 2021 | 18 | 2021 |
| A 0.6 V class-AB rail-to-rail CMOS OTA exploiting threshold lowering F Centurelli, P Monsurrò, G Parisi, P Tommasino, A Trifiletti Electronics Letters 54 (15), 930-932, 2018 | 18 | 2018 |
Alessandro TrifilettiProfessore ordinario di Elettronica, Università degli Studi di Roma "La Sapienza"Verified email at uniroma1.it
