Daniel Llamocca
Separable FIR filtering in FPGA and GPU implementations: Energy, Performance, and Accuracy considerations
D Llamocca, C Carranza, M Pattichis
2011 21st International Conference on Field Programmable Logic and …, 2011
A Fixed-point implementation of the natural logarithm based on a expanded hyperbolic CORDIC algorithm
DR Llamocca-Obregón, CP Agurto-Ríos
XII Workshop IBERCHIP, San Jose, Costa Rica, March 2006, 2006
Partial reconfigurable FIR filtering system using distributed arithmetic
D Llamocca, M Pattichis, GA Vera
International Journal of Reconfigurable Computing 2010 (1), 357978, 2010
A Dynamically Reconfigurable Pixel Processor System based on Power/Energy-Performance-Accuracy Optimization
D Llamocca, M Pattichis
Circuits and Systems for Video Technology, IEEE Transactions on 23 (3), 488-502, 2013
An interdisciplinary collaboration between computer engineering and mathematics/bilingual education to develop a curriculum for underrepresented middle school students
S Celedón-Pattichis, CA LópezLeiva, MS Pattichis, D Llamocca
Cultural Studies of Science Education 8, 873-887, 2013
Dynamic energy, performance, and accuracy optimization and management using automatically generated constraints for separable 2d fir filtering for digital video processing
D Llamocca, M Pattichis
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (4), 1-30, 2014
Dose rate upset investigations on the Xilinx Virtex IV field programmable gate arrays
A Vera, D Llamocca, M Pattichis, W Kemp, W Shedd, D Alexander, J Lyke
2007 IEEE Radiation Effects Data Workshop, 172-176, 2007
Fast and scalable computation of the forward and inverse discrete periodic radon transform
C Carranza, D Llamocca, M Pattichis
IEEE Transactions on Image Processing 25 (1), 119-133, 2015
Fast 2d convolutions and cross-correlations using scalable architectures
C Carranza, D Llamocca, M Pattichis
IEEE Transactions on Image Processing 26 (5), 2230-2245, 2017
System and methods for dynamic management of hardware resources
MS Pattichis, Y Jiang, DRL Obregon
US Patent 9,111,059, 2015
A unified and pipelined hardware architecture for implementing intra prediction in HEVC
Y Jiang, D Llamocca, M Pattichis, G Esakki
2014 Southwest Symposium on Image Analysis and Interpretation, 29-32, 2014
A dynamically reconfigurable parallel pixel processing system
D Llamocca, M Pattichis, A Vera
2009 International Conference on Field Programmable Logic and Applications …, 2009
A dynamically reconfigurable platform for fixed-point FIR filters
D Llamocca, M Pattichis, GA Vera
2009 International Conference on Reconfigurable Computing and FPGAs, 332-337, 2009
A dynamically reconfigurable computing model for video processing applications
G Alonzo Vera, D Llamocca, MS Pattichis, J Lyke
Signals, Systems and Computers, 2009 Conference Record of the Forty-Third …, 2009
VHDL Coding for FPGAs
D Llamocca
VHDL Coding for FPGAs. Website.< http://www. secs. oakland. edu/~ llamocca …, 2018
Self-reconfigurable architectures for HEVC forward and inverse transform
D Llamocca
Journal of Parallel and Distributed Computing 109, 178-192, 2017
Cell-Based Architecture for Adaptive Wiring Panels: A First Prototype
V Murray, D Llamocca, J Lyke, K Avery, Y Jiang, M Pattichis
Journal of Aerospace Information Systems 10 (4), 187-208, 2013
Real-time dynamically reconfigurable 2-D filterbanks
D Llamocca, M Pattichis
2010 IEEE Southwest Symposium on Image Analysis & Interpretation (SSIAI …, 2010
A low-power spike-like neural network design
M Losh, D Llamocca
Electronics 8 (12), 1479, 2019
Dynamic multiobjective optimization management of the Energy-Performance-Accuracy space for Separable 2-D complex filters
D Llamocca, C Carranza, M Pattichis
22nd international conference on field programmable logic and applications …, 2012
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