| Testing of high-speed DACs using PRBS generation with “Alternate-Bit-Tapping” M Singh, M Sakare, S Gupta 2011 Design, Automation & Test in Europe, 1-6, 2011 | 15 | 2011 |
| A power and area efficient architecture of a PRBS generator with multiple outputs M Sakare IEEE Transactions on Circuits and Systems II: Express Briefs 64 (8), 927-931, 2016 | 12 | 2016 |
| Bandwidth enhancement of flip-flops using feedback for high-speed integrated circuits M Sakare, SP Kumar, S Gupta IEEE Transactions on Circuits and Systems II: Express Briefs 63 (8), 768-772, 2016 | 11 | 2016 |
| Full CMOS implementation of bidirectional associative memory neural network with analog memristive synapse SK Vohra, S Thomas, M Sakare, DM Das 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS …, 2021 | 9 | 2021 |
| A high-speed PRBS generator using flip-flops employing feedback for distributed equalization M Sakare, S Gupta 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 746-749, 2014 | 7 | 2014 |
| A quarter-rate 27-1 Pseudo-random binary sequence generator using interleaved architecture M Sakare 2016 29th International Conference on VLSI Design and 2016 15th …, 2016 | 5 | 2016 |
| A 4 × 20 Gb/s 29-1 PRBS Generator for Testing a High-Speed DAC in 90nm CMOS Technology M Sakare, M Singh, S Gupta Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012 …, 2012 | 5 | 2012 |
| Full CMOS circuit for brain-inspired associative memory with on-chip trainable memristive STDP synapse SK Vohra, SA Thomas, M Sakare, DM Das IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023 | 4 | 2023 |
| CMOS circuit implementation of spiking neural network for pattern recognition using on-chip unsupervised STDP learning SK Vohra, SA Thomas, M Sakare, DM Das arXiv preprint arXiv:2204.04430, 2022 | 3 | 2022 |
| A low power 8 × 27-1 PRBS generator using Exclusive-OR gate merged D flip-flops MK Singh, P Singh, DM Das, M Sakare 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS …, 2021 | 3 | 2021 |
| Analytical modelling of a CMOS inter spike interval decoder for resistive crossbar based brain inspired computing SK Vohra, S Thomas, M Sakare, DM Das 2021 25th International Symposium on VLSI Design and Test (VDAT), 1-4, 2021 | 1 | 2021 |
| Design of a PRBS generator and a serializer using active inductor employed CML latch P Singh, MK Singh, VG Hande, M Sakare 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS …, 2021 | 1 | 2021 |
| Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons SK Vohra, SA Thomas, M Sakare, DM Das Integration 95, 102122, 2024 | | 2024 |
| A PRBS Generator Using Merged XOR-D Flip-Flop as Building Blocks MK Singh, P Singh, U Chichhula, H Mehra, DM Das, M Sakare Circuits, Systems, and Signal Processing 42 (11), 6813-6828, 2023 | | 2023 |
| Analysing Mismatch effect of CMOS Neurons in Spiking Neural Network with Winner-take-all Mechanism SK Vohra, AP James, M Sakare, DM Das 2023 IEEE Nordic Circuits and Systems Conference (NorCAS), 1-7, 2023 | | 2023 |
| A differential delay cell for ring oscillators P Singh, MK Singh, M Sakare Authorea Preprints, 2023 | | 2023 |
| Pseudo-random binary sequences (PRBS) generator for performing on-chip testing and a method thereof M Sakare, P Singh, MK Singh, DM Das, VG Hande US Patent 11,774,496, 2023 | | 2023 |
| Full CMOS Analog Circuit Implementation of Multi-Functional Pavlov Associative Memory using STDP Learning SK Vohra, M Sakare, DM Das 2023 IEEE Women in Technology Conference (WINTECHCON), 1-6, 2023 | | 2023 |
| A Low Power Differential Delay Cell without Cross-Coupled Latch for Ring VCO MK Singh, P Singh, DM Das, M Sakare 2023 18th Conference on Ph. D Research in Microelectronics and Electronics …, 2023 | | 2023 |
| An active inductor employed CML latch for high speed integrated circuits P Singh, MK Singh, VG Hande, M Sakare Analog Integrated Circuits and Signal Processing 114 (3), 277-286, 2023 | | 2023 |
Devarshi Mrinal DasAssistant Professor, Indian Institute of Technology RoparVerified email at iitrpr.ac.in
