Antonio García
Antonio García
Full Professor, Dept. Electronics and Computer Technology, University of Granada
Потвърден имейл адрес: ugr.es - Начална страница
Mobile phone platform as portable chemical analyzer
A García, MM Erenas, ED Marinetto, CA Abad, I de Orbe-Paya, AJ Palma, ...
Sensors and Actuators B: Chemical 156 (1), 350-359, 2011
IPP@ HDL: efficient intellectual property protection scheme for IP cores
E Castillo, U Meyer-Baese, A García, L Parrilla, A Lloris
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on 15 (5 …, 2007
Robust bioinspired architecture for optical-flow computation
G Botella, A García, M Rodríguez-Álvarez, E Ros, U Meyer-Baese, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18 (4), 616-629, 2009
Fast RNS FPL-based communications receiver design and implementation
J Ramírez, A García, U Meyer-Baese, A Lloris
International Conference on Field Programmable Logic and Applications, 472-481, 2002
RNS-enabled digital signal processor design
J Ramirez, A Garcia, S Lopez-Buedo, A Lloris
Electronics Letters 38 (6), 1, 2002
Development of an Electrical Capacitance Tomography system using four rotating electrodes
AM Olmos, MA Carvajal, DP Morales, A García, AJ Palma
Sensors and Actuators A: Physical 148 (2), 366-375, 2008
Efficient wavelet-based ECG processing for single-lead FHR extraction
E Castillo, DP Morales, G Botella, A Garcia, L Parrilla, AJ Palma
Digital Signal Processing 23 (6), 1897-1909, 2013
Flexible ECG acquisition system based on analog and digital reconfigurable devices
DP Morales, A Garcia, E Castillo, MA Carvajal, J Banqueri, AJ Palma
Sensors and Actuators A: Physical 165 (2), 261-270, 2011
Noise Suppression in ECG Signals through Efficient One‐Step Wavelet Processing Techniques
E Castillo, DP Morales, A García, F Martínez-Martí, L Parrilla, AJ Palma
Journal of Applied Mathematics 2013 (1), 763903, 2013
Implementation of a communications channelizer using FPGAs and RNS arithmetic
U Meyer-Bäse, A García, F Taylor
Journal of VLSI signal processing systems for signal, image and video …, 2001
Pipelined Hogenauer CIC filters using field-programmable logic and residue number system
A Garcia, U Meyer-Baese, F Taylor
Proceedings of the 1998 IEEE International Conference on Acoustics, Speech …, 1998
Quantization analysis and enhancement of a VLSI gradient-based motion estimation architecture
G Botella, U Meyer-Baese, A García, M Rodríguez
Digital Signal Processing 22 (6), 1174-1187, 2012
RNS-FPL merged architectures for orthogonal DWT
J Ramírez, A García, PG Fernández, L Parrilla, A Lloris
Electronics Letters 36 (14), 1198-1199, 2000
A look-up scheme for scaling in the RNS
A Garcia, A Lloris
IEEE transactions on computers 48 (7), 748-751, 1999
A new architecture to compute the discrete cosine transform using the quadratic residue number system
J Ramírez, A Garcia, PG Fernández, L Parrilla, A Lloris
2000 IEEE International Symposium on Circuits and Systems (ISCAS) 5, 321-324, 2000
RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic
A Garcia, U Meyer-Base, A Lloris, FJ Taylor
1999 IEEE International Symposium on Circuits and Systems (ISCAS) 1, 486-489, 1999
Automated signature insertion in combinational logic patterns for HDL IP core protection
E Castillo, L Parrilla, A Garcia, U Meyer-Baese, G Botella, A Lloris
2008 4th Southern Conference on Programmable Logic, 183-186, 2008
Design and implementation of high-performance RNS wavelet processors using custom IC technologies
J Ramírez, U Meyer-Bäse, F Taylor, A García, A Lloris
Journal of VLSI signal processing systems for signal, image and video …, 2003
A clustering-based method for single-channel fetal heart rate monitoring
E Castillo, DP Morales, A García, L Parrilla, VU Ruiz, JA Álvarez-Bermejo
PloS one 13 (6), e0199308, 2018
An application of reconfigurable technologies for non-invasive fetal heart rate extraction
DP Morales, A Garcia, E Castillo, MA Carvajal, L Parrilla, AJ Palma
Medical Engineering & Physics 35 (7), 1005-1014, 2013
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