| An Ising model mapping to solve rectangle packing problem K Terada, D Oku, S Kanamaru, S Tanaka, M Hayashi, M Yamaoka, ... 2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 1-4, 2018 | 34 | 2018 |
| A fully-connected Ising model embedding method and its evaluation for CMOS annealing machines D Oku, K Terada, M Hayashi, M Yamaoka, S Tanaka, N Togawa IEICE TRANSACTIONS on Information and Systems 102 (9), 1696-1706, 2019 | 27 | 2019 |
| How to reduce the bit-width of an Ising model by adding auxiliary spins D Oku, M Tawada, S Tanaka, N Togawa IEEE Transactions on Computers 71 (1), 223-234, 2020 | 18 | 2020 |
| Efficient Ising model mapping to solving slot placement problem S Kanamaru, D Oku, M Tawada, S Tanaka, M Hayashi, M Yamaoka, ... 2019 IEEE International Conference on Consumer Electronics (ICCE), 1-6, 2019 | 17 | 2019 |
| A robust scan-based side-channel attack method against HMAC-SHA-256 circuits D Oku, M Yanagisawa, N Togawa 2017 IEEE 7th International Conference on Consumer Electronics-Berlin (ICCE …, 2017 | 8 | 2017 |
| A multiple coefficients trial method to solve combinatorial optimization problems for simulated-annealing-based ising machines K Takehara, D Oku, Y Matsuda, S Tanaka, N Togawa 2019 IEEE 9th International Conference on Consumer Electronics (ICCE-Berlin …, 2019 | 7 | 2019 |
| Scan-based side-channel attack against hmac-sha-256 circuits based on isolating bit-transition groups using scan signatures D Oku, M Yanagisawa, N Togawa IPSJ Transactions on System and LSI Design Methodology 11, 16-28, 2018 | 5 | 2018 |
| Implementation evaluation of scan-based attack against a Trivium cipher circuit D Oku, M Yanagisawa, N Togawa 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 220-223, 2016 | 1 | 2016 |
| Verification Experiment of Scan-based Attack against a Trivium Cipher Circut D Oku, M Yanagisawa, N Togawa IEICE Technical Report; IEICE Tech. Rep. 116 (94), 7-12, 2016 | | 2016 |
