| SPICE compact modeling of bipolar/unipolar memristor switching governed by electrical thresholds F García-Redondo, RP Gowers, A Crespo-Yepes, M López-Vallejo, ... IEEE Transactions on Circuits and Systems I: Regular Papers 63 (8), 1255-1264, 2016 | 76 | 2016 |
| Applications of computation-in-memory architectures based on memristive devices S Hamdioui, HA Du Nguyen, M Taouil, A Sebastian, M Le Gallo, S Pande, ... 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 486-491, 2019 | 43 | 2019 |
| 27.2 M0N0: A performance-regulated 0.8-to-38MHz DVFS ARM cortex-M33 SIMD MCU with 10nW sleep power P Prabhat, B Labbe, G Knight, A Savanth, J Svedas, MJ Walker, S Jeloka, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 422-424, 2020 | 28 | 2020 |
| Building Memristor Applications: From Device Model to Circuit Design F Garcia-Redondo, M López-Vallejo, P Ituero IEEE Transactions on Nanotechnology 13 (6), 1154 - 1162, 2014 | 25 | 2014 |
| AnalogNets: ML-HW co-design of noise-robust TinyML models and always-on analog compute-in-memory accelerator C Zhou, FG Redondo, J Büchel, I Boybat, XT Comas, SR Nandakumar, ... arXiv preprint arXiv:2111.06503, 2021 | 18 | 2021 |
| Self-controlled multilevel writing architecture for fast training in neuromorphic RRAM applications F García-Redondo, M López-Vallejo Nanotechnology 29 (40), 405203, 2018 | 15 | 2018 |
| Ml-hw co-design of noise-robust tinyml models and always-on analog compute-in-memory edge accelerator C Zhou, FG Redondo, J Büchel, I Boybat, XT Comas, SR Nandakumar, ... IEEE Micro 42 (6), 76-87, 2022 | 14 | 2022 |
| On the design and analysis of reliable RRAM-CMOS hybrid circuits F Garcia-Redondo, M López-Vallejo IEEE Transactions on Nanotechnology 16 (3), 514-522, 2017 | 13 | 2017 |
| Evolution of radiation-induced soft errors in FinFET SRAMs under process variations beyond 22nm P Royer, F Garcia-Redondo, M Lopez-Vallejo Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale …, 2015 | 13 | 2015 |
| Reconfigurable writing architecture for reliable RRAM operation in wide temperature ranges F García-Redondo, P Royer, M López-Vallejo, H Aparicio, P Ituero, ... IEEE Transactions on very large scale integration (VLSI) Systems 25 (4 …, 2016 | 12 | 2016 |
| A time-domain current-mode mac engine for analogue neural networks in flexible electronics M Douthwaite, F García-Redondo, P Georgiou, S Das 2019 IEEE Biomedical Circuits and Systems Conference (BioCAS), 1-4, 2019 | 10 | 2019 |
| Advanced integration of variability and degradation in RRAM SPICE compact models F García-Redondo, M López-Vallejo, CL Barrio 2017 14th International Conference on Synthesis, Modeling, Analysis and …, 2017 | 9 | 2017 |
| A CAD framework for the characterization and use of memristor models F García-Redondo, M López-Vallejo, P Ituero, CL Barrio 2012 International Conference on Synthesis, Modeling, Analysis and …, 2012 | 9 | 2012 |
| A compact model for scalable MTJ simulation F Garcia-Redondo, P Prabhat, M Bhargava, C Dray SMACD/PRIME 2021; International Conference on SMACD and 16th Conference on …, 2021 | 8 | 2021 |
| Training DNN IoT applications for deployment on analog NVM crossbars F García-Redondo, S Das, G Rosendale 2020 International Joint Conference on Neural Networks (IJCNN), 1-8, 2020 | 5 | 2020 |
| Ultimate MRAM Scaling: Design Exploration of High-Density, High-Performance and Energy-Efficient VGSOT for Last Level Cache M Gupta, Y Xiangt, F García-Redondo, K Cai, D Abdi, HH Liu, S Rao, ... 2023 International Electron Devices Meeting (IEDM), 1-4, 2023 | 4 | 2023 |
| Stt-mram stochastic and defects-aware dtco for last level cache at advanced process nodes F García-Redondo, S Rao, M Gupta, M Perumkunnil, Y Xiang, D Abdi, ... ESSDERC 2023-IEEE 53rd European Solid-State Device Research Conference …, 2023 | 4 | 2023 |
| A fokker-planck solver to model mtj stochasticity F García-Redondo, P Prabhat, M Bhargava ESSDERC 2021-IEEE 51st European Solid-State Device Research Conference …, 2021 | 4 | 2021 |
| A thermal adaptive scheme for reliable write operation on RRAM based architectures F Garcia-Redondo, M Lopez-Vallejo, P Ituero 2015 33rd IEEE International Conference on Computer Design (ICCD), 367-374, 2015 | 4 | 2015 |
| Non-volatile memory accelerator for artificial neural networks FG Redondo, S Das, PN Whatmough, GA Rosendale US Patent 11,886,972, 2024 | 3 | 2024 |
Marisa Lopez-VallejoIPT Center, UPMПотвърден имейл адрес: die.upm.es
