Dibyendu Das
Dibyendu Das
Потвърден имейл адрес: intel.com
Function inlining versus function cloning
D Das
ACM SIGPLAN Notices 38 (6), 23-29, 2003
A practical and fast iterative algorithm for φ-function computation using DJ graphs
D Das, U Ramakrishna
ACM Transactions on Programming Languages and Systems (TOPLAS) 27 (3), 426-440, 2005
Method and apparatus for providing class hierarchy information for function devirtualization
D Das
US Patent 7,743,368, 2010
Experiences of using a dependence profiler to assist parallelization for multi-cores
D Das, P Wu
2010 IEEE International Symposium on Parallel & Distributed Processing …, 2010
Compiler-controlled extraction of computation-communication overlap in MPI applications
D Das, M Gupta, R Ravindran, W Shivani, P Sivakeshava, R Uppal
2008 IEEE International Symposium on Parallel and Distributed Processing, 1-8, 2008
OpenMP technical report 1 on directives for attached accelerators
E Stotzer, J Beyer, D Das, G Jost, P Raghavendra, J Leidel, A Duran, ...
The OpenMP Architecture Review Board, Tech. Rep, 2012
Speeding up STL Set/Map Usage in C++ Applications
D Das, M Valluri, M Wong, C Cambly
SPEC International Performance Evaluation Workshop, 314-321, 2008
Deep Learning-based Approximate Graph-Coloring Algorithm for Register Allocation
D Das, SA Ahmad, V Kumar
LLVM-HPC Workshop (co-located with Supercomputing 2020), 2020
Efficient lipophilicity prediction of molecules employing deep-learning models
R Datta, D Das, S Das
Journal of Chemometrics and Intelligent Laboratory Systems 213, 2021
Implementing Cross-Device Atomics in Heterogeneous Processors
M Gupta, D Das, P Raghavendra, T Tye, L Lobachev, A Agarwal, ...
IPDPSW, 659-668, 2015
Compiler driven mechanism for registration and deregistration of memory pages
D Das, M Gupta
US Patent 8,612,953, 2013
Process mapping in parallel computing
D Das, N Kathiresan, R Ravindran, B Venkatsubramaniam
US Patent 8,161,127, 2012
A heuristic for the maximum processor requirement for scheduling layered task graphs with cloning
D Das, P Dasgupta, PP Das
Journal of Parallel and Distributed Computing 49 (2), 169-181, 1998
A new method for transparent fault tolerance of distributed programs on a network of workstations using alternative schedules
D Das, P Dasgupta, PP Das
Proceedings of 3rd International Conference on Algorithms and Architectures …, 1997
Scalable partial vectorization
R Ramanarayanan, M Gupta, SS Chakraborty, D Das
US Patent 9,158,511, 2015
Efficient liveness computation using merge sets and DJ-graphs
D Das, B Dupont De Dinechin, R Upadrasta
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-18, 2012
Method and system for mpi_wait sinking for better computation-communication overlap in mpi applications
D Das, M Gupta, R Ravindran, B Venkatsubramaniam
US Patent App. 12/189,258, 2010
Harnessing partial vectorization in Open64 compiler
R Ramanarayanan, M Gupta, SS Chakraborty, D Das, M Lai
2014 IEEE International Advance Computing Conference (IACC), 813-824, 2014
Learning to Combine Instructions in LLVM Compiler
S Mannarswamy, D Das
arXiv preprint arXiv:2202.12379, 2022
SPECNet: Predicting SPEC scores using deep learning
D Das, P Raghavendra, A Ramachandran
Companion of the 2018 ACM/SPEC International Conference on Performance …, 2018
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