| Multi-tone testing of linear and nonlinear analog circuits using polynomial coefficients S Sindia, V Singh, VD Agrawal 2009 Asian test symposium, 63-68, 2009 | 31 | 2009 |
| Polynomial coefficient based DC testing of non-linear analog circuits S Sindia, V Singh, VD Agrawal Proceedings of the 19th ACM Great Lakes symposium on VLSI, 69-74, 2009 | 30 | 2009 |
| A test time theorem and its applications P Venkataramani, S Sindia, VD Agrawal Journal of Electronic Testing 30, 229-236, 2014 | 20 | 2014 |
| Test and diagnosis of analog circuits using moment generating functions S Sindia, VD Agrawal, V Singh 2011 Asian Test Symposium, 371-376, 2011 | 18 | 2011 |
| Parametric fault testing of non-linear analog circuits based on polynomial and V-transform coefficients S Sindia, VD Agrawal, V Singh Journal of Electronic Testing 28, 757-771, 2012 | 16 | 2012 |
| Parametric fault diagnosis of nonlinear analog circuits using polynomial coefficients S Sindia, V Singh, VD Agrawal 2010 23rd International Conference on VLSI Design, 288-293, 2010 | 15 | 2010 |
| Finding best voltage and frequency to shorten power-constrained test time P Venkataramani, S Sindia, VD Agrawal 2013 IEEE 31st VLSI Test Symposium (VTS), 1-6, 2013 | 14 | 2013 |
| MobSched: Customizable scheduler for mobile cloud computing S Sindia, AS Lim, S Gao, V Agrawal, B Black, P Agrawal 45th Southeastern symposium on system theory, 129-134, 2013 | 13 | 2013 |
| Tailoring tests for functional binning of integrated circuits S Sindia, VD Agrawal 2012 IEEE 21st Asian Test Symposium, 95-100, 2012 | 12 | 2012 |
| Non-linear analog circuit test and diagnosis under process variation using V-transform coefficients S Sindia, VD Agrawal, V Singh 29th VLSI Test Symposium, 64-69, 2011 | 10 | 2011 |
| Impact of process variations on computers used for image processing S Sindia, FF Dai, VD Agrawal, V Singh 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 1444-1447, 2012 | 9 | 2012 |
| Testing linear and non-linear analog circuits using moment generating functions S Sindia, VD Agrawal, V Singh 2011 12th Latin American Test Workshop (LATW), 1-6, 2011 | 9 | 2011 |
| High sensitivity test signatures for unconventional analog circuit test paradigms S Sindia, VD Agrawal 2013 IEEE International Test Conference (ITC), 1-10, 2013 | 7 | 2013 |
| Defect level and fault coverage in coefficient based analog circuit testing S Sindia, VD Agrawal, V Singh Journal of Electronic Testing 28, 541-549, 2012 | 7 | 2012 |
| V-transform: an enhanced polynomial coefficient based DC test for non-linear analog circuits S Sindia, V Singh, VD Agrawal Proc. of 8th IEEE East West Design & Test Symposium, 283-286, 2009 | 6 | 2009 |
| Bounds on defect level and fault coverage in linear analog circuit testing S Sindia, V Singh, VD Agrawal Proc 13th VLSI Design and Test Symp, 410-421, 2009 | 4 | 2009 |
| Polynomial coefficient based multi-tone testing of analog circuits S Sindia, V Singh, VD Agrawal Proc. North Atlantic Test Workshop, 9-18, 2009 | 4 | 2009 |
| High sensitivity signatures for test and diagnosis of analog, mixed-signal and radio-frequency circuits S Sindia Auburn University, 2013 | 3 | 2013 |
| Distinguishing process variation induced faults from manufacturing defects in analog circuits using V-transform coefficients S Sindia, VD Agrawal, V Singh 2011 IEEE 43rd Southeastern Symposium on System Theory, 231-236, 2011 | 3 | 2011 |
| Innovative practices session 2C: New technologies, new challenges-2 S Sindia 2015 IEEE 33rd VLSI Test Symposium (VTS), 1-1, 2015 | 2 | 2015 |
