Stanislav G. Sedukhin
Title
Cited by
Cited by
Year
Blocked All-Pairs Shortest Paths Algorithm for Hybrid CPU-GPU System
K Matsumoto, N Nakasato, SG Sedukhin
High Performance Computing and Communications (HPCC), 2011 IEEE 13th …, 2011
502011
Performance tuning of matrix multiplication in OpenCL on different GPUs and CPUs
K Matsumoto, N Nakasato, SG Sedukhin
2012 SC Companion: High Performance Computing, Networking Storage and …, 2012
342012
Design and analysis of systolic algorithms and structures
SG Sedukhin
Programming and Computer Software 17 (2), 73-88, 1992
301992
Implementing a code generator for fast matrix multiplication in OpenCL on the GPU
K Matsumoto, N Nakasato, SG Sedukhin
2012 IEEE 6th International Symposium on Embedded Multicore SoCs, 198-204, 2012
242012
Multi-level optimization of matrix multiplication for GPU-equipped systems
K Matsumoto, N Nakasato, T Sakai, H Yahagi, SG Sedukhin
Procedia CS 4, 342-351, 2011
232011
Orbital algorithms and unified array processor for computing 2D separable transforms
SG Sedukhin, AS Zekri, T Myiazaki
Parallel Processing Workshops (ICPPW), 2010 39th International Conference on …, 2010
192010
Image scrambling based on a new linear transform
AA Ravankar, SG Sedukhin
Multimedia Technology (ICMT), 2011 International Conference on, 3105-3108, 2011
182011
A Solution of the All-Pairs Shortest Paths Problem on the Cell Broadband Engine Processor
K Matsumoto, SG Sedukhin
IEICE transactions on information and systems 92, 1225-1231, 2009
172009
Design of array processors for 2-D discrete Fourier transform
S PENG, I SEDUKHIN, S SEDUKHIN
IEICE TRANSACTIONS on Information and Systems 80 (4), 455-465, 1997
171997
The general matrix multiply-add operation on 2D torus
AS Zekri, SG Sedukhin
Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th …, 2006
142006
Parallel algorithm and architecture for two-step division-free gaussian elimination
S Peng, S Sedukhin, I Sedukhin
Proceedings of International Conference on Application Specific Systems …, 1996
141996
Design and analysis of systolic algorithms for the algebraic path problem
SG Sedukhin
Computers and artificial intelligence 11 (3), 269-292, 1992
131992
Systematic approach and software tool for systolic design
S Sedukhin, I Sedukhin
Parallel Processing: CONPAR 94—VAPP VI, 172-183, 1994
121994
Blocked united algorithm for the all-pairs shortest paths problem on hybrid CPU-GPU systems
K Matsumoto, N Nakasato, SG Sedukhin
IEICE TRANSACTIONS on Information and Systems 95 (12), 2759-2768, 2012
112012
Generalizing matrix multiplication for efficient computations on modern computers
SG Sedukhin, M Paprzycki
International Conference on Parallel Processing and Applied Mathematics, 225-234, 2011
112011
Trident: a scalable architecture for scalar, vector, and matrix operations
MI Soliman, SG Sedukhin
Australian Computer Science Communications 24 (3), 91-99, 2002
112002
A new systolic architecture for pipeline prime factor DFT-algorithm
SG Sedukhin
VLSI, 1994. Design Automation of High Performance VLSI Systems. GLSV'94 …, 1994
111994
Mesh-of-tori: A novel interconnection network for frontal plane cellular processors
AA Ravankar, SG Sedukhin
Networking and Computing (ICNC), 2010 First International Conference on, 281-284, 2010
102010
Orbital systolic algorithms and array processors for solution of the algebraic path problem
SG Sedukhin, T Miyazaki, K Kuroda
IEICE TRANSACTIONS on Information and Systems 93 (3), 534-541, 2010
92010
Parallel blocked algorithm for solving the algebraic path problem on a matrix processor
A Takahashi, S Sedukhin
High Performance Computing and Communications, 786-795, 2005
92005
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Articles 1–20