MERO: A Statistical Approach for Hardware Trojan Detection RS Chakraborty, F Wolff, S Paul, C Papachristou, S Bhunia International Workshop on Cryptographic Hardware and Embedded Systems, 396-410, 2009 | 593 | 2009 |
Event-driven random back-propagation: Enabling neuromorphic deep learning machines EO Neftci, C Augustine, S Paul, G Detorakis Frontiers in neuroscience 11, 324, 2017 | 338 | 2017 |
Hardware Trojan detection by multiple-parameter side-channel analysis S Narasimhan, D Du, RS Chakraborty, S Paul, FG Wolff, CA Papachristou, ... IEEE Transactions on computers 62 (11), 2183-2195, 2012 | 281 | 2012 |
Multiple-parameter side-channel analysis: A non-invasive hardware Trojan detection approach S Narasimhan, D Du, RS Chakraborty, S Paul, F Wolff, C Papachristou, ... 2010 IEEE international symposium on hardware-oriented security and trust …, 2010 | 182 | 2010 |
On-demand transparency for improving hardware Trojan detectability RS Chakraborty, S Paul, S Bhunia 2008 IEEE International Workshop on Hardware-Oriented Security and Trust, 48-50, 2008 | 147 | 2008 |
Vim-scan: A low overhead scan design approach for protection of secret key in scan-based secure chips S Paul, RS Chakraborty, S Bhunia 25th IEEE VLSI Test Symposium (VTS'07), 455-460, 2007 | 130 | 2007 |
Detecting keywords in audio using a spiking neural network M Khellah, O Arad, B Ravindran, S Paul, C Augustine, BU Pedroni US Patent 10,403,266, 2019 | 96 | 2019 |
iACT: A software-hardware framework for understanding the scope of approximate computing AK Mishra, R Barik, S Paul Workshop on Approximate Computing Across the System Stack (WACAS) 52, 2014 | 89 | 2014 |
Reliability-driven ECC allocation for multiple bit error resilience in processor cache S Paul, F Cai, X Zhang, S Bhunia IEEE Transactions on Computers 60 (1), 20-34, 2010 | 74 | 2010 |
A Sub-cm3 Energy-Harvesting Stacked Wireless Sensor Node Featuring a Near-Threshold Voltage IA-32 Microcontroller in 14-nm Tri-Gate CMOS for Always-ON Always-Sensing Applications S Paul, V Honkote, RG Kim, T Majumder, PA Aseron, V Grossnickle, ... IEEE Journal of Solid State Circuits 52 (4), 2017 | 66 | 2017 |
Harvesting wasted heat in a microprocessor using thermoelectric generators: modeling, analysis and measurement Y Zhou, S Paul, S Bhunia Proceedings of the conference on Design, automation and test in Europe, 98-103, 2008 | 64 | 2008 |
A circuit and architecture codesign approach for a hybrid cmos–sttram nonvolatile fpga S Paul, S Mukhopadhyay, S Bhunia IEEE Transactions on Nanotechnology 10 (3), 385-394, 2010 | 51 | 2010 |
A scalable memory-based reconfigurable computing framework for nanoscale crossbar S Paul, S Bhunia IEEE transactions on Nanotechnology 11 (3), 451-462, 2010 | 48 | 2010 |
Reconfigurable computing using content addressable memory for improved performance and resource usage S Paul, S Bhunia Proceedings of the 45th annual design automation conference, 786-791, 2008 | 41 | 2008 |
Hybrid CMOS-STTRAM non-volatile FPGA: Design challenges and optimization approaches S Paul, S Mukhopadhyay, S Bhunia 2008 IEEE/ACM International Conference on Computer-Aided Design, 589-592, 2008 | 38 | 2008 |
Neural and synaptic array transceiver: A brain-inspired computing framework for embedded learning G Detorakis, S Sheik, C Augustine, S Paul, BU Pedroni, N Dutt, J Krichmar, ... Frontiers in neuroscience 12, 583, 2018 | 35 | 2018 |
To reveal the nature of interactions of human hemoglobin with gold nanoparticles having two different morphologies (sphere and star-shaped) by using various spectroscopic … M Chakraborty, S Paul, I Mitra, M Bardhan, M Bose, A Saha, T Ganguly Journal of Photochemistry and Photobiology B: Biology 178, 355-366, 2018 | 33 | 2018 |
Exploring spin transfer torque devices for unconventional computing K Roy, D Fan, X Fong, Y Kim, M Sharad, S Paul, S Chatterjee, S Bhunia, ... IEEE journal on Emerging and Selected Topics in Circuits and Systems 5 (1), 5-16, 2015 | 33 | 2015 |
An energy-efficient graphics processor featuring fine-grain DVFS with integrated voltage regulators, execution-unit turbo, and retentive sleep in 14nm tri-gate CMOS P Meinerzhagen, C Tokunaga, A Malavasi, V Vaidya, A Mendon, ... 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 38-40, 2018 | 32 | 2018 |
Miner. Defining the IEEE-854 floating-point standard in PVS S Paul NASA Technical Memorandum 110167, 1995 | 32 | 1995 |