Sub-20 nm CMOS FinFET technologies YK Choi, N Lindert, P Xuan, S Tang, D Ha, E Anderson, TJ King, J Bokor, ...
International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224 …, 2001
458 2001 Extremely scaled silicon nano-CMOS devices L Chang, Y Choi, D Ha, P Ranade, S Xiong, J Bokor, C Hu, TJ King
Proceedings of the IEEE 91 (11), 1860-1873, 2003
370 2003 Observation of bulk defects by spectroscopic ellipsometry H Takeuchi, D Ha, TJ King
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films 22 (4 …, 2004
288 2004 Non-volatile memory devices including stacked NAND-type resistive memory cell strings and methods of fabricating the same GH Koh, DW Ha
US Patent 7,843,718, 2010
238 2010 FinFET process refinements for improved mobility and gate work function engineering YK Choi, L Chang, P Ranade, JS Lee, D Ha, S Balasubramanian, ...
Digest. International Electron Devices Meeting,, 259-262, 2002
192 2002 Investigation of gate-induced drain leakage (GIDL) current in thin body devices: single-gate ultra-thin body, symmetrical double-gate, and asymmetrical double-gate MOSFETs YK Choi, D Ha, TJ King, J Bokor
Japanese journal of applied physics 42 (4S), 2073, 2003
132 2003 Two-bit cell operation in diode-switch phase change memory cells with 90nm technology DH Kang, JH Lee, JH Kong, D Ha, J Yu, CY Um, JH Park, F Yeung, ...
2008 Symposium on VLSI Technology, 98-99, 2008
129 2008 Method for fabricating MOS transistor C Cho, GH Koh, MH Lee, DW Ha
US Patent 6,335,233, 2002
113 2002 Recent advances in high density phase change memory (PRAM) D Ha, K Kim
2007 International Symposium on VLSI Technology, Systems and Applications …, 2007
95 2007 Nanoscale ultrathin body PMOSFETs with raised selective germanium source/drain YK Choi, D Ha, TJ King, C Hu
IEEE Electron Device Letters 22 (9), 447-448, 2001
89 2001 Hydrogen annealing effect on DC and low-frequency noise characteristics in CMOS FinFETs JS Lee, YK Choi, D Ha, S Balasubramanian, TJ King, J Bokor
IEEE Electron Device Letters 24 (3), 186-188, 2003
88 2003 Si FinFET based 10nm technology with multi Vt gate stack for low power and high performance applications HJ Cho, HS Oh, KJ Nam, YH Kim, KH Yeo, WD Kim, YS Chung, YS Nam, ...
2016 IEEE Symposium on VLSI Technology, 1-2, 2016
86 2016 Highly manufacturable 7nm FinFET technology featuring EUV lithography for low power and high performance applications D Ha, C Yang, J Lee, S Lee, SH Lee, KI Seo, HS Oh, EC Hwang, SW Do, ...
2017 Symposium on VLSI Technology, T68-T69, 2017
76 2017 Tunable work function molybdenum gate technology for FDSOI-CMOS P Ranade, YK Choi, D Ha, A Agarwal, M Ameen, TJ King
Digest. International Electron Devices Meeting,, 363-366, 2002
74 2002 Molybdenum gate technology for ultrathin-body MOSFETs and FinFETs D Ha, H Takeuchi, YK Choi, TJ King
IEEE transactions on electron devices 51 (12), 1989-1996, 2004
69 2004 Reliability study of CMOS FinFETs YK Choi, D Ha, E Snow, J Bokor, TJ King
IEEE International Electron Devices Meeting 2003, 7.6. 1-7.6. 4, 2003
69 2003 Anomalous junction leakage current induced by STI dislocations and its impact on dynamic random access memory devices D Ha, C Cho, D Shin, GH Koh, TY Chung, K Kim
IEEE Transactions on Electron Devices 46 (5), 940-946, 1999
67 1999 Molybdenum gate HfO/sub 2/CMOS FinFET technology D Ha, H Takeuchi, YK Choi, TJ King, WP Bai, DL Kwong, A Agarwal, ...
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004
54 2004 Revival of ferroelectric memories based on emerging fluorite‐structured ferroelectrics JY Park, DH Choe, DH Lee, GT Yu, K Yang, SH Kim, GH Park, SG Nam, ...
Advanced Materials 35 (43), 2204904, 2023
51 2023 Impact of oxygen vacancies on high-/spl kappa/gate stack engineering H Takeuchi, HY Wong, D Ha, TJ King
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004
51 2004