A simple figure of merit of RF MOSFET for low-noise amplifier design I Song, J Jeon, HS Jhon, J Kim, BG Park, JD Lee, H Shin
IEEE Electron Device Letters 29 (12), 1380-1382, 2008
63 2008 Prediction of process variation effect for ultrascaled GAA vertical FET devices using a machine learning approach K Ko, JK Lee, M Kang, J Jeon, H Shin
IEEE Transactions on Electron Devices 66 (10), 4474-4477, 2019
49 2019 An analytical channel thermal noise model for deep-submicron MOSFETs with short channel effects J Jeon, JD Lee, BG Park, H Shin
Solid-State Electronics 51 (7), 1034-1038, 2007
44 2007 8 mW 17/24 GHz dual-band CMOS low-noise amplifier for ISM-band application HS Jhon, I Song, J Jeon, H Jung, M Koo, BG Park, JD Lee, H Shin
Electronics Letters 44 (23), 1353-1354, 2008
35 2008 The first observation of shot noise characteristics in 10-nm scale MOSFETs J Jeon, J Lee, J Kim, CH Park, H Lee, H Oh, HK Kang, BG Park, H Shin
2009 Symposium on VLSI Technology, 48-49, 2009
34 2009 Temporal noise analysis and reduction method in CMOS image sensor readout circuit BC Kim, J Jeon, H Shin
IEEE transactions on electron devices 56 (11), 2489-2495, 2009
31 2009 Device and circuit exploration of multi-nanosheet transistor for sub-3 nm technology node Y Seon, J Chang, C Yoo, J Jeon
Electronics 10 (2), 180, 2021
30 2021 A novel tensile Si (n) and compressive SiGe (p) dual-channel CMOS FinFET co-integration scheme for 5nm logic applications and beyond D Bae, G Bae, KK Bhuwalka, SH Lee, MG Song, T Jeon, C Kim, W Kim, ...
2016 IEEE International Electron Devices Meeting (IEDM), 28.1. 1-28.1. 4, 2016
30 2016 Analysis of self-heating effects in multi-nanosheet FET considering bottom isolation and package options C Yoo, J Chang, Y Seon, H Kim, J Jeon
IEEE Transactions on Electron Devices 69 (3), 1524-1531, 2022
27 2022 Compact model strategy of metal-gate work-function variation for ultrascaled FinFET and vertical GAA FETs K Ko, M Kang, J Jeon, H Shin
IEEE Transactions on Electron Devices 66 (3), 1613-1616, 2019
26 2019 Analysis on self-heating effects in three-stacked nanoplate FET H Kim, D Son, I Myeong, M Kang, J Jeon, H Shin
IEEE Transactions on Electron Devices 65 (10), 4520-4526, 2018
26 2018 Investigation of gate sidewall spacer optimization from OFF-state leakage current perspective in 3-nm node device D Ryu, I Myeong, JK Lee, M Kang, J Jeon, H Shin
IEEE Transactions on Electron Devices 66 (6), 2532-2537, 2019
20 2019 Analytical thermal noise model of deep-submicron MOSFETs HC Shin, SY Kim, JW Jeon
JSTS: Journal of Semiconductor Technology and Science 6 (3), 206-209, 2006
20 2006 Analysis of electrothermal characteristics of GAA vertical nanoplate-shaped FETs D Son, I Myeong, H Kim, M Kang, J Jeon, H Shin
IEEE Transactions on Electron Devices 65 (7), 3061-3064, 2018
19 2018 Multi-domain compact modeling for GeSbTe-based memory and selector devices and simulation for large-scale 3-D cross-point memory arrays N Xu, J Wang, Y Deng, Y Lu, B Fu, W Choi, U Monga, J Jeon, J Kim, ...
2016 IEEE International Electron Devices Meeting (IEDM), 7.7. 1-7.7. 4, 2016
18 2016 Thermal-Aware Shallow Trench Isolation Design Optimization for Minimizing in Various Sub-10-nm 3-D Transistors I Myeong, D Son, H Kim, M Kang, J Jeon, H Shin
IEEE Transactions on Electron Devices 66 (1), 647-654, 2018
17 2018 Analytical noise parameter model of short-channel RF MOSFETs J Jeon, BG Park, JD Lee, H Shin
Journal of Semiconductor Technology and Science 7 (2), 88-93, 2007
17 2007 Quinacridone-quinoxaline-based copolymer for organic field-effect transistors and its high-voltage logic circuit operations J Jeon, H Jhon, M Kang, HJ Song, TK An
Organic Electronics 56, 1-4, 2018
16 2018 Models of threshold voltage and subthreshold slope for macaroni channel MOSFET Q Nguyen-Gia, M Kang, J Jeon, H Shin
IEEE Electron Device Letters 41 (7), 973-976, 2020
14 2020 Investigation of electrothermal behaviors of 5-nm bulk FinFET J Jeon, HS Jhon, M Kang
IEEE Transactions on Electron Devices 64 (12), 5284-5287, 2017
14 2017