Ken Tokashiki
Ken Tokashiki
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Selectivity in thermal atomic layer etching using sequential, self-limiting fluorination and ligand-exchange reactions
Y Lee, C Huffman, SM George
Chemistry of Materials 28 (21), 7657-7665, 2016
Controlled Layer-by-Layer Etching of MoS2
TZ Lin, BT Kang, MH Jeon, C Huffman, JH Jeon, SJ Lee, W Han, JY Lee, ...
ACS applied materials & interfaces 7 (29), 15892-15897, 2015
Intrinsic characteristics of high-k devices and implications of fast transient charging effects (FTCE)
BH Lee, CD Young, R Choi, JH Sim, G Bersuker, CY Kang, R Harris, ...
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004
Impact of strained-silicon-on-insulator (sSOI) substrate on FinFET mobility
W Xiong, CR Cleavelin, P Kohli, C Huffman, T Schulz, K Schruefer, ...
IEEE Electron Device Letters 27 (7), 612-614, 2006
Growth mechanism of TiN film on dielectric films and the effects on the work function
K Choi, P Lysaght, H Alshareef, C Huffman, HC Wen, R Harris, H Luan, ...
Thin Solid Films 486 (1-2), 141-144, 2005
Thermally stable N-metal gate MOSFETs using La-incorporated HfSiO dielectric
H Alshareef, H Harris, H Wen, C Park, C Huffman, K Choi, H Luan, ...
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 7-8, 2006
Highly manufacturable 45nm LSTP CMOSFETs using novel dual high-k and dual metal gate CMOS integration
S Song, Z Zhang, M Hussain, C Huffman, J Barnett, S Bae, H Li, P Majhi, ...
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 13-14, 2006
Lateral high-speed bipolar transistors on SOI for RF SoC applications
ISM Sun, WT Ng, K Kanekiyo, T Kobayashi, H Mochizuki, M Toita, H Imai, ...
IEEE transactions on Electron Devices 52 (7), 1376-1383, 2005
Integration of dual metal gate CMOS on high-k dielectrics utilizing a metal wet etch process
Z Zhang, SC Song, C Huffman, MM Hussain, J Barnett, N Moumen, ...
Electrochemical and Solid-State Letters 8 (10), G271, 2005
High performance gate first HfSiON dielectric satisfying 45nm node requirements
MA Quevedo-Lopez, SA Krishnan, D Kirsch, CHJ Li, JH Sim, C Huffman, ...
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest., 4 …, 2005
Sub-100 nm InGaAs quantum-well (QW) tri-gate MOSFETs with Al2O3/HfO2 (EOT < 1 nm) for low-power logic applications
TW Kim, DH Kim, DH Koh, HM Kwon, RH Baek, D Veksler, C Huffman, ...
2013 IEEE International Electron Devices Meeting, 16.3. 1-16.3. 4, 2013
Highly manufacturable advanced gate-stack technology for sub-45-nm self-aligned gate-first CMOSFETs
SC Song, Z Zhang, C Huffman, JH Sim, SH Bae, PD Kirsch, P Majhi, ...
IEEE transactions on electron devices 53 (5), 979-989, 2006
Thermal response of Ru electrodes in contact with SiO2 and Hf-based high-k gate dielectrics
HC Wen, P Lysaght, HN Alshareef, C Huffman, HR Harris, K Choi, ...
Journal of Applied Physics 98 (4), 2005
Integration of dual metal gate CMOS with TaSiN (NMOS) and Ru (PMOS) gate electrodes on HfO/sub 2/gate dielectric
ZB Zhang, SC Song, C Huffman, J Barnett, N Moumen, H Alshareef, ...
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005., 50-51, 2005
Demonstration of scaled 0.099µm2 FinFET 6T-SRAM cell using full-field EUV lithography for (Sub-)22nm node single-patterning technology
A Veloso, S Demuynck, M Ercken, AM Goethals, S Locorotondo, ...
2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009
Formation of fully silicided gate with oxide barrier on the source/drain silicide regions
P Kohli, C Huffman, M Ramin
US Patent 7,737,015, 2010
IEEE Electron Dev
W Xiong, CR Cleavelin, P Kohli, C Huffman, T Schulz, K Schruefer, ...
Lett 27 (7), 612-4, 2006
Experimental study of etched back thermal oxide for optimization of the Si/high-k interface
J Barnett, N Moumen, J Gutt, M Gardner, C Huffman, P Majhi, JJ Peterson, ...
MRS Online Proceedings Library (OPL) 811, E1. 4, 2004
Advanced organic polymer for the aggressive scaling of low-k materials
M Pantouvaki, C Huffman, L Zhao, N Heylen, Y Ono, M Nakajima, ...
Japanese Journal of Applied Physics 50 (4S), 04DB01, 2011
Etch back of interconnect dielectrics
DG Farber, T Tsui, R Kraft, C Huffman
US Patent 6,780,756, 2004
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