Kazuya Matsumoto
Kazuya Matsumoto
Verified email at u-aizu.ac.jp - Homepage
Title
Cited by
Cited by
Year
Blocked all-pairs shortest paths algorithm for hybrid CPU-GPU system
K Matsumoto, N Nakasato, SG Sedukhin
2011 IEEE International Conference on High Performance Computing and …, 2011
492011
Performance tuning of matrix multiplication in OpenCL on different GPUs and CPUs
K Matsumoto, N Nakasato, SG Sedukhin
2012 SC Companion: High Performance Computing, Networking Storage and …, 2012
342012
Implementing a Code Generator for Fast Matrix Multiplication in OpenCL on the GPU
K Matsumoto, N Nakasato, SG Sedukhin
242012
Multi-level optimization of matrix multiplication for GPU-equipped systems
K Matsumoto, N Nakasato, T Sakai, H Yahagi, SG Sedukhin
Procedia Computer Science 4, 342-351, 2011
232011
A solution of the all-pairs shortest paths problem on the Cell broadband engine processor
K Matsumoto, SG Sedukhin
IEICE TRANSACTIONS on Information and Systems 92 (6), 1225-1231, 2009
172009
Implementation of CG method on GPU cluster with proprietary interconnect TCA for GPU direct communication
K Matsumoto, T Hanawa, Y Kodama, H Fujii, T Boku
2015 IEEE International Parallel and Distributed Processing Symposium …, 2015
132015
Blocked United Algorithm for the All-Pairs Shortest Paths Problem on Hybrid CPU-GPU Systems
K MATSUMOTO, N NAKASATO, SG SEDUKHIN
IEICE TRANSACTIONS on Information and Systems 95 (12), 2759-2768, 2012
112012
Application of a communication-avoiding generalized minimal residual method to a gyrokinetic five dimensional Eulerian code on many core platforms
Y Idomura, T Ina, A Mayumi, S Yamada, K Matsumoto, Y Asahi, ...
Proceedings of the 8th Workshop on Latest Advances in Scalable Algorithms …, 2017
82017
密結合並列演算加速機構 TCA を用いた GPU 間直接通信による Collective 通信の実装と予備評価
松本和也, 塙敏博, 児玉祐悦, 藤井久史, 朴泰祐
研究報告計算機アーキテクチャ (ARC) 2014 (23), 1-10, 2014
72014
密結合並列演算加速機構 TCA を用いた GPU 間直接通信による CG 法の実装と予備評価
松本和也, 塙敏博, 児玉祐悦, 藤井久史, 朴泰祐
研究報告ハイパフォーマンスコンピューティング (HPC) 2014 (12), 1-9, 2014
7*2014
Matrix Inversion on the Cell/BE Processor
S Yokoyama, K Matsumoto, S Sedukhin
2009 11th IEEE International Conference on High Performance Computing and …, 2009
72009
Implementing Level-3 BLAS Routines in OpenCL on Different Processing Units
K Matsumoto, N Nakasato, S Sedukhin
Technical Report, The University of Aizu, 2014
52014
密結合並列演算加速機構 TCA による GPU 間直接通信における Collective 通信の実装と性能評価
松本和也, 塙敏博, 児玉祐悦, 藤井久史, 朴泰祐
情報処理学会論文誌コンピューティングシステム (ACS) 8 (4), 36-49, 2015
32015
Evaluation of FFT for GPU Cluster Using Tightly Coupled Accelerators Architecture
T Hanawa, H Fujii, N Fujita, T Odajima, K Matsumoto, T Boku
2015 IEEE International Conference on Cluster Computing, 635-641, 2015
32015
The Algebraic Path Problem on the Cell/BE Processor
K Matsumoto, SG Sedukhin
The University of Aizu, Tech. Rep 2, 2010, 2010
32010
Improving Strong-Scaling on GPU Cluster Based on Tightly Coupled Accelerators Architecture
T Hanawa, H Fujii, N Fujita, T Odajima, K Matsumoto, Y Kodama, T Boku
2015 IEEE International Conference on Cluster Computing, 88-91, 2015
22015
Matrix multiply-add in min-plus algebra on a short-vector SIMD processor of Cell/BE
K Matsumoto, SG Sedukhin
2010 First International Conference on Networking and Computing, 272-274, 2010
22010
密結合並列演算加速機構 TCA を用いた GPU 間直接通信による Collective 通信の実装と性能評価
松本和也, 塙敏博, 児玉祐悦, 藤井久史, 朴泰祐
ハイパフォーマンスコンピューティングと計算科学シンポジウム論文集 2015, 120-128, 2015
12015
Implementation and Evaluation of NAS Parallel CG Benchmark on GPU Cluster with Proprietary Interconnect TCA
K Matsumoto, N Fujita, T Hanawa, T Boku
International Conference on Vector and Parallel Processing, 135-145, 2016
2016
密結合並列演算加速機構 TCA による並列 GPU コードの性能予測モデル
松本和也, 塙敏博, 藤田典久, 桑原悠太, 朴泰祐
研究報告ハイパフォーマンスコンピューティング (HPC) 2015 (35), 1-8, 2015
2015
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