| Skew aware polarity assignment in clock tree PY Chen, KH Ho, TT Hwang 2017 IEEE/ACM International Conference on Computer-Aided Design, 376-379, 2007 | 33 | 2007 |
| Routing for chip-package-board co-design considering differential pairs JW Fang, KH Ho, YW Chang 2008 IEEE/ACM International Conference on Computer-Aided Design, 512-517, 2008 | 28 | 2008 |
| TRECO: Dynamic technology remapping for timing engineering change orders KH Ho, JHR Jiang, YW Chang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 26 | 2012 |
| ECO timing optimization using spare cells and technology remapping KH Ho, YP Chen, JW Fang, YW Chang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 26 | 2010 |
| High variation-tolerant obstacle-avoiding clock mesh synthesis with symmetrical driving trees XW Shih, HC Lee, KH Ho, YW Chang 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 452-457, 2010 | 24 | 2010 |
| Coupling-aware length-ratio-matching routing for capacitor arrays in analog integrated circuits KH Ho, HC Ou, YW Chang, HF Tsao Proceedings of the 50th Annual Design Automation Conference, 1-6, 2013 | 21 | 2013 |
| A new asynchronous pipeline template for power and performance optimization KH Ho, YW Chang Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 9 | 2014 |
| Clock rescheduling for timing engineering change orders KH Ho, XW Shih, JHR Jiang 17th Asia and South Pacific Design Automation Conference, 517-522, 2012 | 5 | 2012 |
| Sensitivity-based multiple-Vt cell swapping for leakage power reduction WP Lee, HY Liu, KH Ho, YW Chang 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI …, 2008 | 3 | 2008 |
| Practical substrate design considering symmetrical and shielding routes HY Chi, SYH Chen, HM Chen, CN Liu, YC Kuo, YH Chang, KH Ho 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 951-956, 2022 | 2 | 2022 |
| Coupling-aware length-ratio-matching routing for capacitor arrays in analog integrated circuits KH Ho, HC Ou, YW Chang, HF Tsao IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015 | | 2015 |
| TRECO: dynamic technology remapping for timing engineering change orders. KH Ho, JHR Jiang, YW Chang 15th Asia South Pacific Design Automation Conference, 331-336, 2010 | | 2010 |
