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Dr. Imran Ahmed Khan
Dr. Imran Ahmed Khan
Verified email at jmi.ac.in
Title
Cited by
Cited by
Year
2 GHz low power double edge triggered flip-flop in 65nm CMOS technology
IA Khan, D Shaikh, MT Beg
Signal Processing, Computing and Control (ISPCC), 2012 IEEE International …, 2012
172012
Role of carbon-based nanomaterials in enhancing the performance of energy storage devices: Design small and store big
B Yogeswari, I Khan, MS Kumar, N Vijayanandam, PA Devarani, ...
Journal of Nanomaterials 2022, 1-10, 2022
152022
Low power area efficient self-gated flip flop: Design, implementation and analysis in emerging devices.
OA Shah, G Nijhawan, IA Khan
Engineering & Applied Science Research 49 (6), 2022
122022
Design of Rain Detection System for Power Windows
IAKK Gupta
International Journal of Advanced Research in Computer Science and Software …, 2015
11*2015
Analysis of different techniques for low power Single Edge Triggered Flip Flops
IA Khan, OA Shah, MT Beg
2011 World Congress on Information and Communication Technologies, 1363-1367, 2011
112011
CFD Investigation of Circular and Square Sectioned Rib Fitted Solar Air Heater
AS Yadav, IA Khan, AK Bhaisare
International Journal of Advance Research in Science and Engineering (IJARSE …, 2016
102016
Design and analysis of low power master slave flip-flops
IA Khan, MT Beg
Informacije Midem-Journal of Microelectronics, Electronic Components and …, 2013
92013
Improved sense amplifier based flip flop design For Low power and high data activity circuits
OA Shah, G Nijhawan, IA Khan
Journal of Applied Science and Engineering 26 (7), 1045-1051, 2022
82022
Power efficient design of semi-dynamic master slave single edge triggered flip-flop
IA Khan, MT Beg
International Journal on Electrical Engineering and Informatics 11 (2), 252-262, 2019
82019
Low transistor count storage elements and their performance comparison
OA Shah, IA Khan, G Nijhawan, I Garg
2018 International Conference on Advances in Computing, Communication …, 2018
82018
Clock Gated Single Edge Triggered Flip-Flop Design with Improved Power for Low Data Activity Applications
IAKMT Beg
International Journal on Electrical Engineering and Informatics, Print ISSN …, 2014
7*2014
Clock Gated Single-Edge-Triggered Flip-Flop Design with Improved Power for Low Data Activity Applications
IA Khan, MT Beg
International Journal of Electronics & Communication Technology (IJECT) 5 (3 …, 2014
72014
A new area and power efficient single edge triggered flip-flop structure for low data activity and high frequency applications
IA Khan, MT Beg
Innovative Systems Design and Engineering 4 (1), 1-12, 2013
72013
Comparitive analysis of low power master slave single edge triggered flip flops
IA Khan, MT Beg
World applied sciences journal 16, 15-21, 2012
72012
A glitch free variability resistant high speed and low power sense amplifier based flip flop for digital sequential circuits
OA Shah, G Nijhawan, IA Khan
Engineering Research Express 5 (3), 035046, 2023
62023
Analytical comparison of Power Efficient and High Performance Adders at 32nm Technology
MRMJPK Imran Ahmed Khan
Innovations in Electronics and Communication Engineering, Lect. Notes in …, 2020
5*2020
Comparative analysis of ANN techniques for predicting channel frequencies in cognitive radio
I Khan, S Wasi, A Waqar, S Khadim
International Journal of Advanced Computer Science and Applications 8 (12), 2017
52017
Prognosis and diagnosis of cracks of cantilever composite beam by vibration analysis and hybrid AI technique
IA Khan, AS Yadav, AK Shakya
International Journal of Advanced Technology in Engineering And Science 4 (1 …, 2016
52016
Design and Implementation of Carbon Nano-tube based Full Adder at 32nm Technology for High Speed and Power Efficient Arithmetic Applications
IA Khan
Journal of Physics: Conference Series 2161 (1), 012050, 2022
42022
Intelligent use of fog devices in edge‐cloud paradigm to assist in E‐polling
A Khalid, M Shahbaz, IA Khan
Concurrency and computation: practice and experience 31 (8), e4957, 2019
42019
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