| Boosting CUDA applications with CPU–GPU hybrid computing C Lee, WW Ro, JL Gaudiot International Journal of Parallel Programming 42 (2), 384-404, 2014 | 40 | 2014 |
| Cooperative heterogeneous computing for parallel processing on CPU/GPU hybrids C Lee, WW Ro, JL Gaudiot 2012 16th Workshop on Interaction between Compilers and Computer …, 2012 | 26 | 2012 |
| Measuring Error-Tolerance in SRAM Architecture on Hardware Accelerated Neural Network S Kwon, K Lee, Y Kim, KA Kim, C Lee, WW Ro ICCE-Asia, 2016 | 14 | 2016 |
| REACT: Scalable and High-Performance Regular Expression Pattern Matching Accelerator for In-Storage Processing WS Jeong, C Lee, K Kim, MK Yoon, W Jeon, M Jung, WW Ro IEEE Transactions on Parallel and Distributed Systems 31 (5), 1137-1151, 2020 | 12 | 2020 |
| CASINO core microarchitecture: Generating out-of-order schedules using cascaded in-order scheduling windows I Jeong, S Park, C Lee, WW Ro 2020 IEEE International Symposium on High Performance Computer Architecture …, 2020 | 12 | 2020 |
| Workload synthesis: Generating benchmark workloads from statistical execution profile K Kim, C Lee, JH Jung, WW Ro 2014 IEEE International Symposium on Workload Characterization (IISWC), 120-129, 2014 | 12 | 2014 |
| Offloading of media transcoding for high-quality multimedia services SH Kim, K Kim, C Lee, WW Ro IEEE Transactions on Consumer Electronics 58 (2), 691-699, 2012 | 12 | 2012 |
| NVDIMM-C: A byte-addressable non-volatile memory module for compatibility with standard DDR memory interfaces C Lee, W Shin, DJ Kim, Y Yu, SJ Kim, T Ko, D Seo, J Park, K Lee, S Choi, ... 2020 IEEE International Symposium on High Performance Computer Architecture …, 2020 | 10 | 2020 |
| A performance-energy model to evaluate single thread execution acceleration SH Kim, D Kim, C Lee, WS Jeong, WW Ro, JL Gaudiot IEEE Computer Architecture Letters 14 (2), 99-102, 2014 | 9 | 2014 |
| Parallelized sub-resource loading for web rendering engine D Kim, C Lee, S Lee, WW Ro Journal of Systems Architecture 59 (9), 785-793, 2013 | 7 | 2013 |
| Simultaneous and speculative thread migration for improving energy efficiency of heterogeneous core architectures C Lee, WW Ro IEEE Transactions on Computers 67 (4), 498-512, 2017 | 5 | 2017 |
| A frequency scaling model for energy efficient DVFS designs based on circuit delay optimization KB Chun, C Lee, WW Ro 2015 International Symposium on Consumer Electronics (ISCE), 1-2, 2015 | 5 | 2015 |
| OverCome: Coarse-grained instruction commit with handover register renaming I Jeong, C Lee, K Kim, WW Ro IEEE Transactions on Computers 68 (12), 1802-1816, 2019 | 2 | 2019 |
| Mark-sharing: A parallel garbage collection algorithm for low synchronization overhead H Park, C Lee, SH Kim, WW Ro, JL Gaudiot 2013 International Conference on Parallel and Distributed Systems, 18-25, 2013 | 2 | 2013 |
| Scheduling apparatus and method for load balancing when performing multiple transcoding operations J Kim, SM Kim, WW Ro, C Lee, W Jeong, JW Kim US Patent 9,304,965, 2016 | | 2016 |
| Maximizing DRAM performance using selective operating frequency boosting JH Jung, SH Kim, C Lee, WW Ro The 18th IEEE International Symposium on Consumer Electronics (ISCE 2014), 1-2, 2014 | | 2014 |
| Development of Virtual CUDA Systems for Parallel Processing on CPU and GPGPU D Oh, S Lee, D Kim, C Lee, WW Ro | | 2010 |
Won Woo RoYonsei UniversityПотвърден имейл адрес: yonsei.ac.kr
